This invention relates to the adjustment of voltage threshold in an integrated circuit, and specifically to the adjustment of a voltage for a CMOS formed on a SOI substrate.
The uniformity of the top silicon film in a silicon-on-insulator (SOI) device may vary by as much as xc2x15 nm. While this variation is relatively small for a top silicon film having a thickness greater than 100 nm, the variation for a top silicon film when the film is less than 20 nm thick is on the order of 25%. When the top silicon film is thinned, as by a thermal oxidation process, the film thickness may vary from 15 nm to 25 nm. A 25% variation in the uniformity of the thickness of the top silicon film renders threshold adjustment difficult in such cases.
State-of-the-art fully-depleted SOI threshold voltage adjustment techniques require either uniform doping of the SOI film, providing a uniformly distributed doping density, which causes the threshold voltage to increase linearly with the thickness of the top silicon film; or implantation of specific ions into the SOI to provide a constant total dopant in the top silicon film, however, as the top silicon film becomes very thin, it becomes more difficult to control the total doping density over a top silicon film of varying thickness. Neither technique provides threshold voltage adjustments uniformly within the SOI film. The ultra thin SOI film is obtained by thinning normal SOI film with a thermal oxidation process. The amount of silicon removed by thermal oxidation is very uniform across a SOI wafer. As a result, any non-uniformity in the original SOI film is transferred to the ultra thin SOI film. If the original SOI film is 100 nmxc2x110 nm, thinning the film to 20 nm produces a SOI film thickness across the wafer of 20 nmxc2x110 nm. This results in a film thickness variation increase from 10% to 50%, which severely affects the threshold voltage of a resultant MOS transistor.
A method of adjusting the threshold voltage in an ultra-thin SOI MOS transistor includes preparing a SOI substrate; thinning the SOI top silicon film to a thickness of between about 10 nm and 50 nm; forming an absorption layer on the top silicon film; and implanting ions into the top silicon film through the absorption layer.
It is an object of the invention to provide a method to minimize or eliminate the thickness dependence of ultra-thin SOI MOS transistor threshold voltage.
This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings.